Legato (TM) Reliability Solution
Cadence(R) Design Framework II
Cadence Framework Integration Runtime Option
Cadence(R) Design Framework Integrator's Toolkit
Virtuoso(R) Simulation Environment
Virtuoso(R) Schematic VHDL Interface
Virtuoso(R) Schematic Editor Verilog(R) Interface
Cadence(R) Simulation Analysis Environment (SimVision)
Virtuoso(R) Schematic Editor HSPICE Interface
Cadence (R) SimVision Mixed-Signal Debug Option
Enterprise Simulator - XL Interface for MTI
Enterprise Simulator - XL Interface for VCS
Virtuoso(R) Analog Oasis Run-Time Option
Cadence(R) OASIS for RFDE
Virtuoso(R) Spectre Model Interface Option
Virtuoso(R) Analog HSPICE Interface Option
Spectre(R) RelXpert Reliability Simulator
Virtuoso Phase Designer
Spectre Characterization Simulator Option
Spectre(R) X Characterization Simulator Option
Dracula(R) Graphical User Interface
Spectre(R) Classic Simulator
Spectre(R) - RF option for 38500 and 91050
Interactive mode for Spectre(R) using Python/TCL
Virtuoso(R) AMS Designer Environment
Spectre AMS Connector
Spectre AMS Designer
Dracula(R) Design Rule Checker
Dracula(R) Layout Vs. Schematic Verifier
Dracula(R) Parasitic Extractor
Dracula(R) Physical Verification Suite
Dracula(R) Physical Verification and Extraction Suite
Diva(R) Design Rule Checker
Diva(R) Layout Vs. Schematic Verifier
Diva(R) Parasitic Extractor
Diva(R) Physical Verification Suite
Diva(R) Physical Verification and Extraction Suite
Assura(TM) Design Rule Checker
Assura(TM) Layout Vs. Schematic Verifier
Assura(TM) Graphical User Interface Option
Assura(TM) Multiprocessor Option
Spectre(R) MMSIM with Spectre X Simulator
Spectre(R) Accelerated Parallel Simulator
Spectre(R) X Simulator
Spectre(R) Power Option
Spectre(R) CPU Accelerator Option
Spectre(R) X Multi-Core Simulation Option
Spectre Extensive Partitioned Simulator
Virtuoso(R) EDIF 200 Reader
Virtuoso(R) EDIF 200 Writer
Virtuoso(R) Schematic Editor L
Virtuoso(R) Schematic Editor XL
Virtuoso(R) ADE Explorer
Virtuoso Integration of MathWorks MATLAB Option
Virtuoso(R) Visualization & Analysis XL
Virtuoso(R) ADE Assembler
Virtuoso(R) Variation Option
Virtuoso(R) ADE Verifier
Virtuoso(R) Layout Suite L
Virtuoso(R) Layout Suite XL
Virtuoso(R) DFM Option
Virtuoso Layout Suite GXL
Virtuoso Implementation Aware Design Option
Virtuoso System Design Platform
Virtuoso Layout Suite EAD
Virtuoso Advanced Device Modeling HVMOS (For Eldo)
Virtuoso Advanced Device Modeling HVMOS (For HSPICE)
Incisive Enterprise Specman Elite Testbench
Voltus-Fi Custom Power Integrity Solution - L
Voltus-Fi Custom Power Integrity Solution - XL
Voltus-Fi Custom Power Integrity Solution - AA Advanced Analysis GXL Option (VTS-Fi-AA)
Xcelium Limited Single-Core
Xcelium Limited Single-Core Legacy
Xcelium Single-Core
Xcelium Single-Core Legacy
Xcelium Digital Mixed Signal Option
Legato (TM) Reliability Solution
Cadence(R) Design Framework II
Cadence Framework Integration Runtime Option
Cadence(R) Design Framework Integrator's Toolkit
Virtuoso(R) Simulation Environment:
Virtuoso(R) Schematic VHDL Interface
Virtuoso(R) Schematic Editor Verilog(R) Interface
Cadence(R) Simulation Analysis Environment (SimVision)
Virtuoso(R) Schematic Editor HSPICE Interface
Cadence (R) SimVision Mixed-Signal Debug Option
Enterprise Simulator - XL Interface for MTI
Enterprise Simulator - XL Interface for VCS
Virtuoso(R) Analog Oasis Run-Time Option
Cadence(R) OASIS for RFDE
Virtuoso(R) Spectre Model Interface Option
Virtuoso(R) Analog HSPICE Interface Option
Spectre(R) RelXpert Reliability Simulator
Virtuoso Phase Designer
Spectre Characterization Simulator Option
Spectre(R) X Characterization Simulator Option
Dracula(R) Graphical User Interface
Spectre(R) Classic Simulator: hspice
Spectre(R) - RF option for 38500 and 91050: spice
Interactive mode for Spectre(R) using Python/TCL
Virtuoso(R) AMS Designer Environment
Spectre AMS Connector
Spectre AMS Designer
Dracula(R) Design Rule Checker
Dracula(R) Layout Vs. Schematic Verifier
Dracula(R) Parasitic Extractor
Dracula(R) Physical Verification Suite
Dracula(R) Physical Verification and Extraction Suite
Diva(R) Design Rule Checker
Diva(R) Layout Vs. Schematic Verifier
Diva(R) Parasitic Extractor
Diva(R) Physical Verification Suite
Diva(R) Physical Verification and Extraction Suite
Assura(TM) Design Rule Checker
Assura(TM) Layout Vs. Schematic Verifier
Assura(TM) Graphical User Interface Option
Assura(TM) Multiprocessor Option
Spectre(R) MMSIM with Spectre X Simulator: spice, hspice,xa, pro
Spectre(R) Accelerated Parallel Simulator: 多买license, 一个license 2个CPU core
Spectre(R) X Simulator: spice
Spectre(R) Power Option
Spectre(R) CPU Accelerator Option
Spectre(R) X Multi-Core Simulation Option
Spectre Extensive Partitioned Simulator
Virtuoso(R) EDIF 200 Reader
Virtuoso(R) EDIF 200 Writer
Virtuoso(R) Schematic Editor L
Virtuoso(R) Schematic Editor XL
Virtuoso(R) ADE Explorer
Virtuoso Integration of MathWorks MATLAB Option
Virtuoso(R) Visualization & Analysis XL
Virtuoso(R) ADE Assembler
Virtuoso(R) Variation Option
Virtuoso(R) ADE Verifier
Virtuoso(R) Layout Suite L
Virtuoso(R) Layout Suite XL
Virtuoso(R) DFM Option
Virtuoso Layout Suite GXL
Virtuoso Implementation Aware Design Option
Virtuoso System Design Platform
Virtuoso Layout Suite EAD
Virtuoso Advanced Device Modeling HVMOS (For Eldo)
Virtuoso Advanced Device Modeling HVMOS (For HSPICE)
Incisive Enterprise Specman Elite Testbench
Voltus-Fi Custom Power Integrity Solution - L
Voltus-Fi Custom Power Integrity Solution - XL
Voltus-Fi Custom Power Integrity Solution - AA Advanced Analysis GXL Option (VTS-Fi-AA)
Xcelium Limited Single-Core
Xcelium Limited Single-Core Legacy
Xcelium Single-Core
Xcelium Single-Core Legacy
Xcelium Digital Mixed Signal Option